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Copyright Cirrus Logic, Inc. 2013
(All Rights Reserved)
Cirrus Logic, Inc.
http://www.cirrus.com
CS1630
CS1631
2-Channel TRIAC Dimmable LED Driver IC
Features
Best-in-class Dimmer Compatibility
- Leading-edge (TRIAC) Dimmers
- Trailing-edge Dimmers
- Digital Dimmers (with Integrated Power Supply)
Correlated Color Temperature (CCT) Control System
Up to 85% Efficiency
Flicker-free Dimming
Programmable Dimming Profile
- Constant CCT Dimming
- Black Body Line Dimming
0% Minimum Dimming Level
Temperature Compensated LED Current
End-of-line Programming Using Power Line Calibration
- Lower LED Binning Requirement
Programmable Series or Parallel Two-Channel Output
- Interleaved Output Eliminates Additional Transformer
Programmable Quasi-resonant Second Stage with
Constant-current Output
- Flyback, Buck, and Tapped Buck
Register Lockout
Fast Startup
Tight LED Current Regulation: Better than ±5%
Primary-side Regulation (PSR)
>0.9 Power Factor
IEC-61000-3-2 Compliant
Soft Start
Protections:
- Output Open/Short
- Current-sense Resistor Open/Short
- External Overtemperature Using NTC
Overview
The CS1630 and CS1631 are high-performance offline AC /DC
LED drivers for dimmable and high color rendering index (CRI)
LED replacement lamps and luminaires. They feature Cirrus
Logic’s proprietary digital dimmer compatibility control technology
and digital correlated color temperature (CCT) control system that
enables two-channel LED color mixing. The CS1630 is designed
for 120VAC line voltage applications, and the CS1631 is
optimized for 230VAC line voltage applications.
The CS1630/31 integrates a critical conduction mode boost
converter, providing power factor correction and superior dimmer
compatibility with a primary-side regulated quasi-resonant second
stage, which is configurable for isolated and non-isolated
topologies. The digital CCT control system provides the ability to
program dimming profiles, such as constant CCT dimming and
black body line dimming. The CS1630/31 optimizes LED color
mixing by temperature compensating LED current with an
external NTC. The IC controller is also equipped with power line
calibration for remote system calibration and end-of-line
programming. The CS1630/31 provides a register lockout feature
for security against potential access to proprietary registers.
Applications
Dimmable Retrofit LED Lamps and LED Luminaries
High CRI Lighting
Offline LED Drivers
Commercial Lighting
Ordering Information
See page 55.
D7
R13
NTC
Z2
BR1 BR1
AC
Mains
C7
L1
D2
BR1 BR1
D5
C8
R11
L2
D6
C2
R4
R8
R14
R6
R7
Q4
Q2
Z1 C4
CS1630 /31
IAC
SOURCE
FBAUX
BSTOUT
GNDSGND
13
16
5
4
CLAMP
GD
FBSENSE
eOTP
15
10
12
11
1
2
BSTAUX
C3
R2
D1
Q3
R10
3
R
S
C
NTC
T1
R1
C1
R5
C6
D4
D3
C5
Q1
R9
R3
V
BST
V
rect
14
VDD
R12
D9
C9
C11
C12
D11
D8
R15 D10
Q5
R16
C10
Z3
IGND
LED2 +
LED 1+
LED 1-
LED2 -
D
GND
_
Q
VCC
APR’13
DS954F3
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Indice de contenidos

Pagina 1 - Overview

Copyright  Cirrus Logic, Inc. 2013(All Rights Reserved)Cirrus Logic, Inc.http://www.cirrus.comCS1630CS16312-Channel TRIAC Dimmable LED Driver ICFeatu

Pagina 2

CS1630/3110 DS954F33.4 Thermal Resistance3.5 Absolute Maximum RatingsCharacteristics conditions:All voltages are measured with respect to GND.Note: 8.

Pagina 3

CS1630/31DS954F3 114. TYPICAL PERFORMANCE PLOTSFigure 3. UVLO CharacteristicsFigure 4. Supply Current vs. VoltageFigure 5. Turn-on/off Threshold Vo

Pagina 4

CS1630/3112 DS954F35. GENERAL DESCRIPTION5.1 OverviewThe CS1630 and CS1631 are high-performance offline AC/DCLED drivers for dimmable and high color r

Pagina 5

CS1630/31DS954F3 13waveform. The information from the probe event is used tomaintain proper operation with the dimmer circuitry.5.3.5 Trailing-edge Mo

Pagina 6

CS1630/3114 DS954F3The reference currents are the required values at ambienttemperature TA= 25ºC and dim = 100%. They are multipliedby the appropriate

Pagina 7

CS1630/31DS954F3 155.6.2 Output BSTOUT Sense & Input IAC SenseA current proportional to boost output voltage VBST is suppliedto the IC on pin BSTO

Pagina 8

CS1630/3116 DS954F3The CS1630/31 provides active clamp circuitry on the CLAMPpin, as shown in Figure 14.A PWM control loop ensures that the boost outp

Pagina 9

CS1630/31DS954F3 17The buck stage is controlled by measuring current in the buckinductor and voltage on the auxiliary winding. Quasi-resonantoperation

Pagina 10 - CS1630/31

CS1630/3118 DS954F3Figure 20 illustrates the tapped buck stage configured forseries output mode.To maintain constant output current with minimum line-

Pagina 11

CS1630/31DS954F3 195.8.6 Output Open Circuit ProtectionOutput open circuit protection and output overvoltageprotection (OVP) are implemented by monito

Pagina 12

CS1630/312 DS954F3TABLE OF CONTENTS1.INTRODUCTION . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

Pagina 13

CS1630/3120 DS954F3Figure 21 illustrates the functional block diagram whenconnecting an optional external NTC temperature sensor tothe eOTP circuit.Cu

Pagina 14

CS1630/31DS954F3 21Beyond this temperature, the IC shuts down using themechanism discussed above. If the external overtemperature protection and thete

Pagina 15

CS1630/3122 DS954F35.10.2 PLC Program Mode CharactersIn order to program the CS1630/31, a set of encodedcharacters is built from specific phase-cut wa

Pagina 16

CS1630/31DS954F3 235.10.4 Register LockoutThe CS1630/31 provides register lockout for security againstunauthorized access to proprietary registers usi

Pagina 17

CS1630/3124 DS954F3whether data transfer is a read or write operation. This bitshould be set to '0' to perform a write operation and '1

Pagina 18

CS1630/31DS954F3 255.11.4 Write OperationTo perform a write operation, the master must write the 7-bitdevice address, the R/W bit, the BLK/SGL bit, an

Pagina 19

CS1630/3126 DS954F35.12 OTP MemoryAt startup, the contents of the OTP memory are read intoshadow registers that make up a register file. Access to the

Pagina 20

CS1630/31DS954F3 276. ONE-TIME PROGRAMMABLE (OTP) REGISTERS6.1 Registers MapAddress RA[7:0] Name Description10 0x00 Config0 Configuration 01 0x01 LOCK

Pagina 21

CS1630/3128 DS954F349 0x31 Config17 Configuration 1750 0x32 Config18 Configuration 1851 0x33 PEAK_CUR Peak Current... ... - Reserved70 0x46

Pagina 22

CS1630/31DS954F3 296.2 Configuration 0 (Config0) – Address 06.3 Lockout Key (LOCK0, LOCK1, LOCK2, LOCK3) – Address 1 - 4 Lockout Key is a 32-bit long-

Pagina 23

CS1630/31DS954F3 36.ONE-TIME PROGRAMMABLE (OTP) REGISTERS . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 276.1 Regi

Pagina 24

CS1630/3130 DS954F36.5 Color Polynomial Coefficient (Q3, Q2, Q1, Q0) – Address 25 - 32 Coefficients of the color polynomial used to calculate the gain

Pagina 25

CS1630/31DS954F3 316.7 Configuration 2 (Config2) – Address 3476543210CLAMP1 CLAMP0 T2COMP - - - VALLEYSW -Number Name Description[7:6] CLAMP[1:0]Confi

Pagina 26

CS1630/3132 DS954F36.8 Configuration 3 (Config3) – Address 3576543210STRING TT_MAX1 TT_MAX0 LED_ARG IPEAK2 IPEAK1 IPEAK0 -Number Name Description[7] S

Pagina 27

CS1630/31DS954F3 336.9 Configuration 4 (Config4) – Address 366.10 Second Stage Dim (S2DIM) – Address 37S2DIM sets the minimum dim for second stage (fl

Pagina 28

CS1630/3134 DS954F36.12 Configuration 7 (Config7) – Address 396.13 Configuration 8 (Config8) – Address 4076543210PROBE PRCNT3 PRCNT2 PRCNT1 PRCNT0 - -

Pagina 29

CS1630/31DS954F3 356.14 Channel 1 Output Current (CH1CUR) – Address 41CH1CUR sets the target output current for channel 1. The register value plus bit

Pagina 30

CS1630/3136 DS954F36.17 Configuration 12 (Config12) – Address 446.18 PU Coefficient (PID) – Address 45PID sets the maximum coefficient for the second

Pagina 31

CS1630/31DS954F3 376.20 Configuration 15 (Config15) – Address 476.21 Configuration 16 (Config16) – Address 4876543210EXIT_PH3 EXIT_PH2 EXIT_PH1 EXIT_P

Pagina 32

CS1630/3138 DS954F36.22 Configuration 17 (Config17) – Address 496.23 Configuration 18 (Config18) – Address 5076543210DITHER RESYNC T2CH2GAIN5 T2CH2GAI

Pagina 33

CS1630/31DS954F3 396.24 Peak Current (PEAK_CUR) – Address 51PEAK_CUR sets the boost stage peak current, which assists in configuring the boost output

Pagina 34

CS1630/314 DS954F31. INTRODUCTIONFigure 1. CS1630/31 Block DiagramA typical schematic using the CS1630/31 IC is shown on thefront page.Startup curren

Pagina 35

CS1630/3140 DS954F36.27 Configuration 45 (Config45) – Address 776.28 Configuration 46 (Config46) – Address 7876543210------VDIFF_LATMAX_CURNumber Name

Pagina 36

CS1630/31DS954F3 416.29 Configuration 47 (Config47) – Address 7976543210OCP OLP OVP BOP COP LLP EEOTP IOTPNumber Name Description[7] OCPConfigures sec

Pagina 37

CS1630/3142 DS954F36.30 Configuration 48 (Config48) – Address 806.31 Configuration 49 (Config49) – Address 8176543210OCP_BLANK3 OCP_BLANK2 OCP_BLANK1

Pagina 38

CS1630/31DS954F3 436.32 Configuration 50 (Config50) – Address 826.33 Configuration 51 (Config51) – Address 8376543210OVP_CNT2 OVP_CNT1 OVP_CNT0 OVP_LA

Pagina 39

CS1630/3144 DS954F36.34 Configuration 52 (Config52) – Address 8476543210COP_THRES6 COP_THRES5 COP_THRES4 COP_THRES3 COP_THRES2 COP_THRES1 COP_THRES0 C

Pagina 40

CS1630/31DS954F3 456.35 Configuration 53 (Config53) – Address 8576543210BOP_INTEG2 BOP_INTEG1 BOP_INTEG0 BOP_THRES3 BOP_THRES2 BOP_THRES1 BOP_THRES0 B

Pagina 41

CS1630/3146 DS954F36.36 Configuration 54 (Config54) – Address 8676543210LLP_TIME2 LLP_TIME1 LLP_TIME0 BOP_RSTART - - - -Number Name Description[7:5] L

Pagina 42

CS1630/31DS954F3 476.37 Configuration 55 (Config55) – Address 876.38 PLC Dim (PLC_DIM) – Address 89PLC_DIM sets the second stage dim level while in PL

Pagina 43

CS1630/3148 DS954F36.39 Configuration 58 (Config58) – Address 906.40 Configuration 59 (Config59) – Address 9176543210SHUTDWN3 SHUTDWN2 SHUTDWN1 SHUTDW

Pagina 44

CS1630/31DS954F3 496.41 Configuration 60 (Config60) – Address 926.42 Configuration 61 (Config61) – Address 9376543210- PLC - CS_DELAY2 CS_DELAY1 CS_DE

Pagina 45

CS1630/31DS954F3 52. PIN DESCRIPTIONPin NamePin # I/ODescriptionBSTAUX1INBoost Zero-current Detect — Boost Inductor demagnetization sensing input for

Pagina 46

CS1630/3150 DS954F36.43 Configuration 62 (Config62) – Address 946.44 CRC Tag (CRC_TAG) – Address 102CRC Tag register used by the communication system.

Pagina 47

CS1630/31DS954F3 516.45 Channel 1 Color Calibration 3A (CH1_CAL3A) – Address 1196.46 Channel 2 Color Calibration 3A (CH2_CAL3A) – Address 1206.47 CRC

Pagina 48

CS1630/3152 DS954F36.48 Channel 1 Color Calibration 3B (CH1_CAL3B) – Address 1226.49 Channel 2 Color Calibration 3B (CH2_CAL3B) – Address 1236.50 CRC

Pagina 49

CS1630/31DS954F3 536.51 Channel 1 Color Calibration 3C (CH1_CAL3C) – Address 1256.52 Channel 2 Color Calibration 3C (CH2_CAL3C) – Address 1266.53 CRC

Pagina 50

CS1630/3154 DS954F37. PACKAGE DRAWING1. Controlling dimensions are in millimeters.2. Dimensions and tolerances per ASME Y14.5M.3. This drawing conform

Pagina 51

CS1630/31DS954F3 558. ORDERING INFORMATION9. ENVIRONMENTAL, MANUFACTURING, & HANDLING INFORMATION Ordering Number Container AC Line Voltage Tempe

Pagina 52

CS1630/3156 DS954F310.REVISION HISTORYRevision Date ChangesPP1 OCT 2011 Edited for contentPP2 JAN 2012 Edited for clarity and corrected typographical

Pagina 53

CS1630/316 DS954F33. CHARACTERISTICS AND SPECIFICATIONS3.1 Electrical CharacteristicsTypical characteristics conditions: •TA=25ºC, VDD= 12V, GND = 0V•

Pagina 54

CS1630/31DS954F3 7Notes: 1. The CS1630/31 has an internal shunt regulator that limits the voltage on the VDD pin. VZ, the shunt regulation voltage, is

Pagina 55

CS1630/318 DS954F33.2 I2C™ Port Switching CharacteristicsTest conditions (unless otherwise specified): • Inputs: Logic 0 = GND = 0V, Logic 1 = 3.3V.•

Pagina 56

CS1630/31DS954F3 93.3 Power Line Calibration CharacteristicsTypical characteristics conditions: •TA=25ºC, VDD= 12V, GND = 0V• All voltages are measure

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