Cirrus-logic CS4349 Manual de usuario

Copyright  Cirrus Logic, Inc. 2013(All Rights Reserved)http://www.cirrus.com192-kHz DAC with Volume Control and 1 Vrms @ 3.3 VFeatures Advanced mult

10 DS782F2CS43492.4 DAC Analog Characteristics - Automotive (-DZZ)Test conditions (unless otherwise specified): VLS = 1.35 V to 5.25 V, VLC = 3.14 V t

DS782F2 11CS4349Figures 3 through 5 show typical THD+N performance for CS4349 devices that exhibit the maximum fullscale output voltages as specified

12 DS782F2CS43492.5 Combined Interpolation and On-Chip Analog Filter ResponseThe filter characteristics have been normalized to the sample rate (Fs) a

DS782F2 13CS43492.6 Switching Specifications - Serial Audio InterfaceInputs: Logic 0 = GND; Logic 1 = VLS; CL=20pF. Table 7. Switching Specifications

14 DS782F2CS4349.2.7 Switching Characteristics - Control Port - I²C FormatInputs: Logic 0 = GND; Logic 1 = VLC; CL=20pF.Notes: 9. tspi only needed bef

DS782F2 15CS43492.8 Switching Characteristics - Control Port - SPI Format Inputs: Logic 0 = GND; Logic 1 = VLC; CL=20pF. Notes: 10. Data must be held

16 DS782F2CS43492.9 Digital Characteristics2.10 Power and Thermal Characteristics Notes: 13. Current consumption increases with increasing Fs within t

DS782F2 17CS43493 TYPICAL CONNECTION DIAGRAM DigitalAudioSourceVLSGNDAOUTA+0.1 µF+10 µFµ C/ModeConfigurationSDINDIF1(SCL/CCLK)DIF0(SDA/CDIN)3.3 µFAO

18 DS782F2CS43494 APPLICATIONS4.1 Sample Rate Range and Oversampling Mode DetectThe device operates in one of three oversampling modes based on the in

DS782F2 19CS43494.3 Digital Interface FormatThe device will accept audio samples in 1 of 8 digital interface formats, as shown in Table 13 on page 24f

2 DS782F2CS4349DescriptionThe CS4349 is a complete stereo digital-to-analog system including digital interpolation, 5th-order multi-bit delta-sigma di

20 DS782F2CS43494.3.1 Time-Division Multiplex (TDM) ModeFour TDM interface modes are available that allow the CS4349 to input stereo PCM data in one o

DS782F2 21CS43494.4 De-EmphasisThe device includes on-chip digital de-emphasis. Figure 16 shows the de-emphasis curve for Fs equal to44.1 kHz. The fre

22 DS782F2CS43494.6.2 Control Port Mode1. Hold RST low until the power supply is stable and the left/right clock is fixed to the appropriate frequency

DS782F2 23CS43494.8 Analog Output and FilteringThe CS4349 requires a simple single-ended passive output design as shown in Figure 17.4.9 Grounding and

24 DS782F2CS43495 STAND-ALONE OPERATION5.1 Serial Port Format SelectionThe desired serial audio format is selected with the DIF2, DIF1 and DIF0 pins.

DS782F2 25CS43496 CONTROL PORT OPERATIONThe control port is used to load all the internal register settings (see ”Register Description” on page 29). T

26 DS782F2CS4349MAP or the default address (see Section 6.4.2) if an I²C read is the first operation performed on the device. 3. Once the device has t

DS782F2 27CS43496.3.2 SPI ReadTo read from the device, follow the procedure below while adhering to the values specified in ”SwitchingCharacteristics

28 DS782F2CS43497 REGISTER QUICK REFERENCEAddr Function 7 6 5 4 3 2 1 01h Device and RevID DeviceID4 DeviceID3 DeviceID2 DeviceID1 DeviceID0 RevID2 Re

DS782F2 29CS43498 REGISTER DESCRIPTIONNote: All register access is R/W unless specified otherwise.8.1 Device and Revision ID - Register 01h Function:T

DS782F2 3CS4349TABLE OF CONTENTS1 PIN DESCRIPTION...

30 DS782F2CS43498.2.2 De-Emphasis Control (DEM[1:0]) Bits 3-2 Default = 000 - No De-emphasis01 - 44.1 kHz De-emphasis10 - 48 kHz De-emphasis11 - 32 kH

DS782F2 31CS43498.3.3 Invert Signal Polarity (INVERT_B) Bit 5Function:When set to 1, this bit inverts the signal polarity of channel B.When set to 0 (

32 DS782F2CS43498.4 Mute Control - Register 04h 8.4.1 Auto-Mute (AMUTE) Bit 7Function:When set to 1 (default), the Digital-to-Analog converter output

DS782F2 33CS43498.5 Channel A & B Volume Control - Register 05h & 06h Digital Volume Control (VOL[7:0]) Bits 7-0Default = 00h (0 dB) Function:

34 DS782F2CS4349Soft Ramp and Zero CrossSoft Ramp and Zero Cross Enable dictate that signal level changes, either by attenuation changes or mut-ing, w

DS782F2 35CS43498.7 Miscellaneous Control - Register 08h 8.7.1 Power Down (PDN) Bit 7Function:When set to 1, the entire device enters a low-power stat

36 DS782F2CS43499 FILTER PLOTS 0.4 0.5 0.6 0.7 0.8 0.91120100806040200Frequency(normalized to Fs)Amplitude (dB)Figure 22. Stopband Rejection (Fast

DS782F2 37CS434910 PARAMETER DEFINITIONSTotal Harmonic Distortion + Noise (THD+N)The ratio of the rms value of the signal to the rms sum of all other

38 DS782F2CS434911 PACKAGE DIMENSIONS1. D” and “E1” are reference datums and do not include mold flash or protrusions, but do include moldmismatch and

DS782F2 39CS434913 ORDERING INFORMATION14 REVISION HISTORY Product Description PackagePb-FreeGrade Temp Range ContainerOrder#CS4349192 kHz Stereo DA

4 DS782F2CS43498.2.3 Functional Mode (FM[1:0]) Bits 1-0... 308.3 Vo

DS782F2 5CS4349LIST OF FIGURESFigure 1. Output Test Load ...

6 DS782F2CS43491 PIN DESCRIPTION Table 1. Pin DescriptionPin Name#Pin DescriptionVLC 5 Control Interface Power (Input) - Positive power for the ha

DS782F2 7CS4349Control Port DefinitionsAD1/CDOUT 1 Address Bit 1 / Serial Control Data Out (I/O) - Chip address bit 1 in I²C Mode or data output in SP

8 DS782F2CS43492 CHARACTERISTICS AND SPECIFICATIONS 2.1 Recommended Operating ConditionsGND = 0 V; all voltages with respect to ground.2.2 Absolute Ma

DS782F2 9CS43492.3 DAC Analog Characteristics - Commercial (-CZZ)Test conditions (unless otherwise specified): VLS = VLC = 3.3 V; TA = 25° C; input te