Cirrus-logic CS5513 Manual de usuario

Copyright  Cirrus Logic, Inc. 2009(All Rights Reserved)http://www.cirrus.com CS5510/11/12/1316-bit and 20-bit, 8-pin ΔΣ ADCsFeatures Delta-sigma Ana

CS5510/11/12/1310 DS337F42. GENERAL DESCRIPTIONThe CS5510/11/12/13 are low-cost, easy-to-use,ΔΣ analog-to-digital converters (ADCs) which usecharge ba

CS5510/11/12/13DS337F4 11CS5512/13. The CS5510/11 follow the samecurve, but are limited to 16 bits of resolution. Notethat the reference voltage shoul

CS5510/11/12/1312 DS337F4V+VREFAIN+SCLKSDOCS5510/11/12/13CS+5.0 VSupply12684Clock SourceSerialDataInterfaceAIN-3V-70.1μF(Required forCS5510/12Applicat

CS5510/11/12/13DS337F4 13V+VREFAIN+SCLKSDOCS5510/11/12/13CS+3.3 V/+3.0VSupply12684Clock SourceSerialDataInterfaceAIN-3V-7+-0.1μF+-(Required forCS5510/

CS5510/11/12/1314 DS337F4ground pin, CSLow defines the logic-low level forthe digital interface. Figures 9 and 10 illustrate thethreshold levels of th

CS5510/11/12/13DS337F4 15CS5511/13 and oscillates at 64 kHz ±32 kHz. Theoutput word rate (OWR) for the CS5511/13 is de-rived from the internal oscilla

CS5510/11/12/1316 DS337F42.5.1 Reading Conversions - CS5510/12After power-up, the CS5510/12 will begin convert-ing once a clock source is applied to t

CS5510/11/12/13DS337F4 172.5.3 Output CodingAs shown in Tables 1 and 2, the CS5510/11/12/13present output conversions as 24-bit conversionwords. The f

CS5510/11/12/1318 DS337F4cessively overranged. If the OD bit is set, the con-version data bits can be completely erroneous. TheOD flag bit will be cle

CS5510/11/12/13DS337F4 19valid conversion due to the modified Sinc4 filtercharacteristics. 2.5.5 Multiplexed ApplicationsThe settling performance of

CS5510/11/12/132 DS337F4TABLE OF CONTENTS1. CHARACTERISTICS AND SPECIFICATIONS ...

CS5510/11/12/1320 DS337F4priate time during the third conversion cycle to en-sure the maximum possible throughput.2.6 Digital Off-chip System Calibrat

CS5510/11/12/13DS337F4 213. PIN DESCRIPTIONSControl Pins and Serial Data I/OCS - Chip Select, Pin 4CS is a dual function pin, which determines the sta

CS5510/11/12/1322 DS337F44. SPECIFICATION DEFINITIONSLinearity ErrorThe deviation of a code from a straight line which connects the two end points of

CS5510/11/12/13DS337F4 235. ORDERING INFORMATION6. ENVIRONMENTAL, MANUFACTURING, & HANDLING INFORMATION* MSL (Moisture Sensitivity Level) as speci

CS5510/11/12/1324 DS337F47. PACKAGE DIMENSIONSINCHES MILLIMETERSDIM MIN NOM MAX MIN NOM MAXA 0.076 0.080 0.084 1.93 2.03 2.13A1 0.004 0.007 0.010 0.10

CS5510/11/12/13DS337F4 258. REVISION HISTORY Revision Date ChangesF2 MAR 2005 Added lead-free (Pb) device ordering information.F3 AUG 2005 Updated lea

CS5510/11/12/1326 DS337F4Contacting Cirrus Logic SupportFor all product questions and inquiries contact a Cirrus Logic Sales Representative. To find t

CS5510/11/12/13DS337F4 3LIST OF FIGURESFigure 1. SDO Read Timing CS5510/12 ...

CS5510/11/12/134 DS337F41. CHARACTERISTICS AND SPECIFICATIONSANALOG CHARACTERISTICS (TA = 25° C; V+ = 5 V ±5%; V- = 0 V; VREF = 2.5 V (relative to V-

CS5510/11/12/13DS337F4 5ANALOG CHARACTERISTICS (Continued)Notes: 8. VREF is referenced to V- and must be less than or equal to V+.9. Due to current th

CS5510/11/12/136 DS337F4DYNAMIC CHARACTERISTICS ABSOLUTE MAXIMUM RATINGS (V- = 0 V) (See Note 15.)Notes: 15. All voltages with respect to V-.16. V+ an

CS5510/11/12/13DS337F4 7SWITCHING CHARACTERISTICS - CS5510/12 (TA = 25° C; V+ = 5 V ±5%; V- = 0 V; Input Levels: Logic 0 = 0 V, Logic 1 = V+; CL = 50

CS5510/11/12/138 DS337F4SWITCHING CHARACTERISTICS - CS5511/13 (TA = 25° C; V+ = 5 V ±5%; V- = 0 V; Input Levels: Logic 0 = 0 V, Logic 1 = V+; CL = 50

CS5510/11/12/13DS337F4 9 MSB MSB-1 LSBt3 t5t4t1t2t11SCLKSDOCSFigure 1. SDO Read Timing CS5510/12 (Not to Scale).Figure 2. SDO Read Timing CS5511/13 (