Cirrus-logic AN269 Manual de usuario Pagina 11

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AN269
AN269REV1 11
The output mode “Single 16-bit 555 Pixel Per Clock” is shown in Figure 4. In this mode, each SPCLK will clock out
a single pixel, with 5 bits representing the Blue component on P[5:1], Green component on P[11:7], and Red com-
ponent of the pixel on P[17:13].
0
1
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0
0
0
1
1
1
Pixel Data Bus
Pins P[17:0]
Pixel 0 (First SPCLK)
Pixel 1 (Second SPCLK)
Pixel Data Most Significant Bits
(from LUT and Blink Logic)
Figure 4. Single 16-bit 555 Pixel Per Clock Output
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