Cirrus-logic AN366 Manual de usuario

Copyright  Cirrus Logic, Inc. 2012(All Rights Reserved)Cirrus Logic, Inc.http://www.cirrus.comApplication NoteCS5480/84/90 Energy Measurement IC Cali

AN36610 AN366REV2Current Scale RegisterTo perform calibration with less than full scale load without using the above procedure, it is possible to sett

AN366AN366REV2 11Figure 6. Phase Compensation and Phase Offset Error4.2.2 No Load Power CompensationThere are two power compensations in the CS5480/8

AN36612 AN366REV25 Calibration and Compensation ProceduresA CS5480/84/90 power meter normally has two modes of operation: calibration, which is execut

AN366AN366REV2 13START CONTINUOUS CONVERSION0xD5CLEARDRDYREAD IRMS,VRMS, PAVGDRDYSET?POWER UPRESTORE CONFIGURATION and CONTROL REGISTERSFrom NVMRESTOR

AN36614 AN366REV25.2 Full Calibration and Compensation Procedure (Performed Once at Factory)The following procedure shows the steps required to perfor

AN366AN366REV2 15RESET(See Note 1)ROGOWSKISENSOR?ENABLEHIGH PASSFILTERENABLEINTEGRATOR on CURRENT & HIGH PASS on VOLTAGEFULL LOADAVAILABLE?APPLY R

AN36616 AN366REV2RESOLUTIONMULTIPLIER0.008789 (50Hz)(Note 1)-8.99º < PHASE OFFSET< +8.99º (50Hz)?(Note 2)PHASE OFFSETNEGATIVE?FINE COMPENSATION

AN366AN366REV2 17FROM MAIN FLOWCLEAR DRDYSEND AC OFFSET CALIBRATION0xF6REMOVE LOAD CURRENTREAD IRMS,IACOFFDRDYSET?CHECKINPUTORFAILRETURNIACOFFto MAIN

AN36618 AN366REV26 Full Calibration and Compensation Example Using the CDB5484 and MTE Meter Test EquipmentThe calibration and compensation flows have

AN366AN366REV2 19Figure 13. MTE Meter Test Equipment Calibration Hardware SetupMTE Meter Test Equipment AG PTS 400.3 Modular Portable Test SystemRefe

AN3662 AN366REV23.1 System Scaling OverviewThe maximum voltage, current, and power measurements are unique in each meter design and dependent onthe se

AN36620 AN366REV26.1 Normal Operation Flow Diagram Using the CDB5484The following flow diagram shows the implementation of normal flow executed in the

AN366AN366REV2 21RESTORE REGISTERSVarious configurations include writes to registers (see Figure 14):Config 0 RegisterSDI = 0x80 0x40 0x400000 Write R

AN36622 AN366REV2RESTORE GAIN CONFIGURATION(See Figure 15.)Gain Channel 1, Volt.SDI = 0x90 0x63 0x401BE3 Write Register V1 GainSDO = 0xFF 0xFF 0xFFFFF

AN366AN366REV2 23RESTORE OFFSET CONFIGURATION(See Figure 15.)DC Offset Channel 1, Volt.SDI = 0x90 0x62 0x000000 Write Register V1 DC OffsetSDO = 0xFF

AN36624 AN366REV2RESTORE NO LOAD CONFIGURATION(See Figure 15.)P1 OffsetSDI = 0x90 0x64 0x000003 Write Register P1 Active Power OffsetSDO = 0xFF 0xFF 0

AN366AN366REV2 25VALID REGISTER CHECKSUM?Read register checksum and compare to stored value in NVM (see Figure 17).SDI = 0x90 0x01 0xFFFFFF Read Regis

AN36626 AN366REV2START CONTINUOUS CONVERSION(See Figure 18.)SDI = 0xD5 Send Continuous Conversion CommandFigure 18. Conversion WindowWAIT FOR TSETTLE

AN366AN366REV2 27CLEAR DRDY in INTERRUPT STATUSSDI = 0x80 0x57 0x800000 Write DRDY Interrupt in Status 0SDO = 0xFF 0xFF 0xFFFFFF (Page 0, Register 23

AN36628 AN366REV2Figure 19. Conversion WindowCALCULATE VOLTS, AMPS, AND WATTSChannel 1AMPS1 = HEX2DEC(I1RMS) / 0xFFFFFF / 0.6  FS_CurrentVOLTS1 = HE

AN366AN366REV2 296.2 Main Calibration Flow Diagram Using the CDB5484The following flow diagram shows the implemented of gain calibration using the CDB

AN366AN366REV2 33.2 System Scale ExampleFigure 1 illustrates an example of the system scaling.Figure 1. System Scaling- Hardware Scale: The CS5480/84

AN36630 AN366REV2SINGLE CONVERSIONThe register checksum is computed each time a conversion is completed (Single or Con-tinuous).(See Figure 21.)SDI =

AN366AN366REV2 31ENABLE HIGH PASS ON VOLTAGE AND CURRENT(See Figure 23.)SDI = 0x90 0x40 0x0602AA Write Register Config2 to enable HPFsSDO = 0xFF 0xFF

AN36632 AN366REV2APPLY FULL-SCALE VOLTAGE TO SOURCE(See Figure 24.)Figure 24. Meter Test EquipmentSee Non-full-scale Gain Calibration on page 9.FULL

AN366AN366REV2 33SET TSETTLE(See Figure 26.)SDI = 0x90 0x79 0x001F40 Write TSETTLE = 2000msSDO = 0xFF 0xFF 0xFFFFFF (Page 16, Register 57)SDI = 0x90 0

AN36634 AN366REV2START CONTINUOUS CONVERSION(See Figure 28.)SDI = 0xD5 Write Continuous ConversionSDO = 0xFFFigure 28. Conversion WindowSTART CONTINU

AN366AN366REV2 35IS PF=1?PC/Controller tests if PF returned is 1.STOP CONVERSIONS(See Figure 29.)SDI = 0xD8 Write Halt ConversionSDO = 0xFFFigure 29.

AN36636 AN366REV2CHECK STATUS OF DRDYSDI = 0x80 0x17 0xFFFFFF Read INT STATUS DRDY (page 0, register 23)SDO = 0xFF 0xFF 0x4XXXXX (DRDY not Set)SDI =

AN366AN366REV2 37PERFORM AC OFFSET AND READ IRMSNote: AC offset is only required when IRMS measurements are needed with high dynamic range (only helpf

AN36638 AN366REV2Figure 33. Calibration WindowCHECK IF FULL LOAD IS AVAILABLEPC/Controller knows if full load or partial load set. The following step

AN366AN366REV2 39COMPUTE CALIBRATED REGISTER CHECKSUMThe register checksum is computed each time a conversion is completed (Single or Con-tinuous). If

AN3664 AN366REV23.3 AFE Scaling RangeThe CS5484 full scale RMS register values are commonly reported as 0.6 when the inputs are at a maximumlevel. The

AN36640 AN366REV26.2.1 Phase Compensation Flow DiagramThe following flow diagram shows the implemented of phase compensation using the CDB5484U and a

AN366AN366REV2 41STOP CONVERSIONS(See Figure 37.)SDI = 0x90 0x15 0xFFFFFF Read PF1 (page 16, register 21)SDO = 0xFF 0xFF 0x410F40 (0.508278)SDI = 0x90

AN36642 AN366REV2PHASE OFFSETPC/Controller test for phase calibration range meet or fail meter. This example shows neg-ative phase offset.Figure 38.

AN36643ACCUMULATE MULTIPLE PF READING AND CONFIRM(See Figure 39.)SDI = 0x90 0x15 0xFFFFFF Read PF1 (page 16, register 21)SDO = 0xFF 0xFF 0x410F40 (0.5

AN366446.2.2 AC Offset Calibration Flow DiagramThe following flow diagram shows the implemented of AC offset calibration using the CDB5484U and a PCas

AN36645SEND AC OFFSET CALIBRATION(See Figure 41.)SDI = 0xF6 Write AC Offset Calibration – All ChannelsSDO =0xFFFigure 41. Calibration WindowDRDY SE

AN366466.2.3 DC Offset Calibration Flow DiagramThe implemented of DC offset calibration follows the same structure as AC offset except that the voltag

AN366476.2.4 No Load Offset Compensation Flow DiagramThe following flow diagram shows the implemented of no load power offset compensation using theCD

AN36648ACCUMULATE MULTIPLE PAVG, QAVG READINGS(See Figure 44.)Channels 1 and 2, Active PowerSDI = 0x90 0x05 0xFFFFFF Read P1AVG (page 16, register 5)S

AN36649SET POFF AND QOFFNegate PAVG and QAVG registers and store in POFF and QOFF respectively (seeFigure 44).SDI = 0x90 0x64 0xFFFFFF Write P1OFF (pa

AN366AN366REV2 53.4 Application Processor Scaling ExampleThe scaling example below demonstrates how to convert from the current register value to the

AN36650Revision HistoryRevision Date ChangesREV1 APR 2012 Initial release.REV 2 MAY 2012 Corrected typographical errors.Contacting Cirrus Logic Suppor

AN3666 AN366REV2Use Equation 5 to convert the hexadecimal value to a decimal ratio value:Using Equation 5, the following table identifies the key valu

AN366AN366REV2 7Figure 4 illustrates a typical hardware configuration for calibration and compensation:Figure 4. Calibration and Compensation Hardwar

AN3668 AN366REV24.1 AFE CalibrationsThe CS5480/84/90 AFE incorporates three calibrations: gain, AC offset, and DC offset. Gain calibration is al-ways

AN366AN366REV2 94.1.2.2 Non-full-scale Gain CalibrationWhen resources are limited, it may be necessary to provide non-full-scale amplitudes and perfor