Cirrus-logic CDB53L30 Manual de usuario descargar pdf (Pagina 17)

17 DS963DB1

CDB53L30

5 Performance Plots

Test conditions (unless otherwise specified): FS

ext

=48kHz; MCLK

ext

= 12.2880 MHz; preamp setting: 0 dB (bypassed);

PGA setting: 0 dB; high-pass filter enabled, ADCx_HPF_CF = 00; notch filter disabled; noise gate disabled; MCLK

autoscale enabled; VA = 1.8 V, VP = 3.6 V. THD+N measurement bandwidth = 10 Hz to FS

ext

/2, no weighting. Unless

otherwise specified, the performance data is representative of all channels on both CS53L30 devices.

Figure 5-1. Output FFT, Preamp Setting: 0 dB,

PGA Setting: 0 dB, 1 kHz, –1 dBFS

Figure 5-2. Output FFT, Preamp Setting: 0 dB,

PGA Setting: +12 dB, 1 kHz, –1 dBFS

Figure 5-3. Output FFT, Preamp Setting: +10 dB,

PGA Setting: 0 dB, 1 kHz, –1 dBFS

Figure 5-4. Output FFT, Preamp Setting: +10 dB,

PGA Setting: +12 dB, 1 kHz, –1 dBFS

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Cirrus-logic CDB53L30 Manual de usuario Pagina 17

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