Cirrus-logic CS4224 Manual de usuario descargar pdf (Pagina 9)

CS4223 CS4224

DS290F1 9

SWITCHING CHARACTERISTICS (Outputs loaded with 30 pF)

Notes: 10. After powering up the CS4223/4, PDN should be held low for 10 ms to allow the power supply to settle.

Parameter Symbol Min Typ Max Unit

Audio ADC’s and DAC’s Sample Rate Fs 4 - 50 kHz

XTI Frequency XTI = 256, 384, or 512 Fs 1.024 - 26 MHz

XTI Pulse Width High XTI = 512 Fs

XTI = 384 Fs

XTI = 256 Fs

XTI Pulse Width Low XTI = 512 Fs

XTI = 384 Fs

XTI = 256 Fs

XTI Jitter Tolerance - 500 - psRMS

RST

Low Time (Note 10) 10 - - ms

SCLK falling edge to SDOUT output valid DSCK = 0 t

dpd

-- ns

LRCK edge to MSB valid t

lrpd

--45ns

SDIN setup time before SCLK rising edge DSCK = 0 t

25 - - ns

SDIN hold time after SCLK rising edge DSCK = 0 t

25 - - ns

SCLK Period t

sckw

--ns

SCLK High Time t

sckh

40 - - ns

SCLK Low Time t

sckl

40 - - ns

SCLK rising to LRCK edge DSCK = 0 t

lrckd

35 - - ns

LRCK edge to SCLK rising DSCK = 0 t

lrcks

40 - - ns

(384) Fs

---------------------- 2 0+

(128) Fs

----------------------

sckh

sckl

sckw

MSB MSB-1

*SCLK shown for DSCK = 0, SCLK inverted for DSCK = 1.

dpd

SDOUT

LRCK

SCLK*

SDIN

lrpd

lrcks

lrckd

Figure 1. Serial Audio Port Data I/O Timing

1 2 3 4 5 6 7 8 9 10 11 12 13 14 ... 33 34

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Cirrus-logic CS4224 Manual de usuario Pagina 9

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