Cirrus-logic CS4953xx Manual de usuario

Copyright 2010 Cirrus Logic, Inc. FEB ’10DS732UM10http://www.cirrus.comCS4953xx 32-bit Audio DSP FamilyPreliminary Product InformationThis document co

OverviewCS4953xx Hardware User’s ManualDS732UM10 Copyright 2010 Cirrus Logic, Inc 1-2Figure 1-1 illustrates the functional block diagram for the CS495

ClockingCS4953xx Hardware User’s ManualDS732UM10 Copyright 2010 Cirrus Logic, Inc 9-12 9.2.3 PLLThe internal phase locked loop (PLL) of the CS4953xx r

ControlCS4953xx Hardware User’s ManualDS732UM10 Copyright 2010 Cirrus Logic, Inc 9-13 Figure 9-10. Crystal Oscillator Circuit Diagram 9.4 ControlThe C

ControlCS4953xx Hardware User’s ManualDS732UM10 Copyright 2010 Cirrus Logic, Inc 9-14Configuration and control of the CS4953xx decoder and its periphe

144-Pin LQFP Pin AssigmentsCS4953xx Hardware User’s ManualDS732UM10 Copyright 2010 Cirrus Logic, Inc 9-15 9.5 144-Pin LQFP Pin AssigmentsFigure 9-11 s

128-Pin LQFP Pin AssigmentsCS4953xx Hardware User’s ManualDS732UM10 Copyright 2010 Cirrus Logic, Inc 9-16 9.6 128-Pin LQFP Pin AssigmentsFigure 9-12 s

DS732UM10 Copyright 2010 Cirrus Logic, Inc 9-17Pin AssignmentsCS4953xx Hardware User’s Manual 9.7 Pin AssignmentsTable 9-10 shows the names and functi

DS732UM10 Copyright 2010 Cirrus Logic, Inc 9-18Pin AssignmentsCS4953xx Hardware User’s Manual14 46 GPIO23General Purpose Input/OutputDAO2_LRCLKSerial

DS732UM10 Copyright 2010 Cirrus Logic, Inc 9-19Pin AssignmentsCS4953xx Hardware User’s Manual29 58 SD_D7 SDRAM Data Bit 7 EXT_D7 Flash Data Bit 7.3.3V

DS732UM10 Copyright 2010 Cirrus Logic, Inc 9-20Pin AssignmentsCS4953xx Hardware User’s Manual45 74 SD_D11 SDRAM Data Bit 11 EXT_D11 Flash Data Bit 113

DS732UM10 Copyright 2010 Cirrus Logic, Inc 9-21Pin AssignmentsCS4953xx Hardware User’s Manual62 91 SD_A6 SDRAM Address Bit 6 EXT_A6 Flash Address Bit

1-3 Copyright 2010 Cirrus Logic, Inc. DS732UM10Functional Overview of the CS4953xx ChipCS4953xx Hardware User’s Manual 1.2 Functional Overview of the

DS732UM10 Copyright 2010 Cirrus Logic, Inc 9-22Pin AssignmentsCS4953xx Hardware User’s Manual79 108 SD_CASSDRAM Column Address Strobe3.3V (5V tol)OUT8

DS732UM10 Copyright 2010 Cirrus Logic, Inc 9-23Pin AssignmentsCS4953xx Hardware User’s Manual95 123 GPIO33General Purpose Input/OutputSCP1_MOSISPI Mod

DS732UM10 Copyright 2010 Cirrus Logic, Inc 9-24Pin AssignmentsCS4953xx Hardware User’s Manual104 - GPIO39General Purpose Input/Output1. PCP_CS2. SCP2_

DS732UM10 Copyright 2010 Cirrus Logic, Inc 9-25Pin AssignmentsCS4953xx Hardware User’s Manual109 - GPIO9General Purpose Input/Output1. PCP_A12. PCP_A9

DS732UM10 Copyright 2010 Cirrus Logic, Inc 9-26Pin AssignmentsCS4953xx Hardware User’s Manual115 - GPIO4General Purpose Input/Output1. PCP_D42. PCP_AD

DS732UM10 Copyright 2010 Cirrus Logic, Inc 9-27Pin AssignmentsCS4953xx Hardware User’s Manual14 GPIO0General Purpose Input/Output1. UART_CLK 1. UART C

DS732UM10 Copyright 2010 Cirrus Logic, Inc 9-28Pin AssignmentsCS4953xx Hardware User’s Manual137 29 DAI1_SCLKPCM Audio Input Bit ClockDSD_CLK DSD Audi

Revision HistoryCS4953xx Hardware User’s ManualDS732UM10 Copyright 2010 Cirrus Logic, Inc 9-29Revision HistoryRevision Date ChangesUM1 MAY 17, 2006 Pr

Revision HistoryCS4953xx Hardware User’s ManualDS732UM10 Copyright 2010 Cirrus Logic, Inc 9-30§§UM10 February 12, 2010Updated Table 2-6, GPIO Pins Ava

Functional Overview of the CS4953xx ChipCS4953xx Hardware User’s ManualDS732UM10 Copyright 2010 Cirrus Logic, Inc 1-4 1.2.6 Compressed Data Input / Di

1-5 Copyright 2010 Cirrus Logic, Inc. DS732UM10Functional Overview of the CS4953xx ChipCS4953xx Hardware User’s ManualBy default, SCP2 is configured a

Functional Overview of the CS4953xx ChipCS4953xx Hardware User’s ManualDS732UM10 Copyright 2010 Cirrus Logic, Inc 1-6 1.2.15 Clock Manager and PLLThe

2-1 Copyright 2010 Cirrus Logic, Inc. DS732UM10OverviewCS4953xx Hardware User’s ManualChapter 2Operational Modes 2.1 OverviewThe CS4953xx has several

OverviewCS4953xx Hardware User’s ManualDS732UM10 Copyright 2010 Cirrus Logic, Inc 2-2 Figure 2-1. Operation Mode Block DiagramsSlave BootSystem Host C

2-3 Copyright 2010 Cirrus Logic, Inc. DS732UM10Operational Mode SelectionCS4953xx Hardware User’s Manual 2.2 Operational Mode SelectionThe operational

Slave Boot ProceduresCS4953xx Hardware User’s ManualDS732UM10 Copyright 2010 Cirrus Logic, Inc 2-4 2.3 Slave Boot ProceduresWhen the CS4953xx is the s

2-5 Copyright 2010 Cirrus Logic, Inc. DS732UM10Slave Boot ProceduresCS4953xx Hardware User’s Manual 2.3.1.1 Performing a Host Controlled Master Boot (

DS732UM10 Copyright 2010 Cirrus Logic, Inc. iiCS4953xx Hardware User’s ManualContacting Cirrus Logic SupportFor all product questions and inquiries co

Slave Boot ProceduresCS4953xx Hardware User’s ManualDS732UM10 Copyright 2010 Cirrus Logic, Inc 2-63. Wait for 10 μS.4.Read the BOOT_START message (See

2-7 Copyright 2010 Cirrus Logic, Inc. DS732UM10Slave Boot ProceduresCS4953xx Hardware User’s Manual17. Read the APP_START message. If code execution i

Slave Boot ProceduresCS4953xx Hardware User’s ManualDS732UM10 Copyright 2010 Cirrus Logic, Inc 2-8 2.3.2.1 Performing a Slave BootFigure 2-3 shows the

2-9 Copyright 2010 Cirrus Logic, Inc. DS732UM10Slave Boot ProceduresCS4953xx Hardware User’s Manual3. Send the SLAVE_BOOT message. The host sends the

Slave Boot ProceduresCS4953xx Hardware User’s ManualDS732UM10 Copyright 2010 Cirrus Logic, Inc 2-10APP_START message. This indicates that the code has

2-11 Copyright 2010 Cirrus Logic, Inc. DS732UM10Slave Boot ProceduresCS4953xx Hardware User’s ManualHCMB_PARALLEL is used when the application code is

Slave Boot ProceduresCS4953xx Hardware User’s ManualDS732UM10 Copyright 2010 Cirrus Logic, Inc 2-12The SPI clock is derived from the internal core clo

2-13 Copyright 2010 Cirrus Logic, Inc. DS732UM10Master Boot ProcedureCS4953xx Hardware User’s ManualTable 2-9 is a quick reference showing the differe

SoftbootCS4953xx Hardware User’s ManualDS732UM10 Copyright 2010 Cirrus Logic, Inc 2-14 2.5 SoftbootThe O/S application code for the CS4953xx allows us

2-15 Copyright 2010 Cirrus Logic, Inc. DS732UM10SoftbootCS4953xx Hardware User’s Manual 2.5.2 Softboot ProcedureFigure 2-5 contains a flow diagram and

DS732UM10 Copyright 2010 Cirrus Logic, Inc. iiiContentsCS4953xx Hardware User’s ManualContents Contents . . . . . . . . . . . . . . . . . . . . . . .

SoftbootCS4953xx Hardware User’s ManualDS732UM10 Copyright 2010 Cirrus Logic, Inc 2-16 2.5.2.2 Softboot ExampleFigure 2-6 contains an example softboot

2-17 Copyright 2010 Cirrus Logic, Inc. DS732UM10SoftbootCS4953xx Hardware User’s Manual 2.5.2.3 Softboot Example Steps1. Send the SOFTBOOT message. Th

SoftbootCS4953xx Hardware User’s ManualDS732UM10 Copyright 2010 Cirrus Logic, Inc 2-18§§

3-1 Copyright 2010 Cirrus Logic, Inc. DS732UM10OverviewCS4953xx Hardware User’s ManualChapter 3Serial Control Port 3.1 OverviewThe CS4953xx uses the S

I2C PortCS4953xx Hardware User’s ManualDS732UM10 Copyright 2010 Cirrus Logic, Inc 3-2 3.3 I2C PortThe CS4953xx I2C bus has been developed for 8-bit di

3-3 Copyright 2010 Cirrus Logic, Inc. DS732UM10I2C PortCS4953xx Hardware User’s ManualAs seen in Figure 3-2, two serial ports are available on the CS4

I2C PortCS4953xx Hardware User’s ManualDS732UM10 Copyright 2010 Cirrus Logic, Inc 3-4 3.3.2 I2C Bus DynamicsThe Start condition for an I2C transaction

3-5 Copyright 2010 Cirrus Logic, Inc. DS732UM10I2C PortCS4953xx Hardware User’s ManualThe number of bytes that can be transmitted per transfer is unre

I2C PortCS4953xx Hardware User’s ManualDS732UM10 Copyright 2010 Cirrus Logic, Inc 3-6 Figure 3-5. Data Byte with ACK and NACKAfter an ACK or NACK from

3-7 Copyright 2010 Cirrus Logic, Inc. DS732UM10I2C PortCS4953xx Hardware User’s Manual Figure 3-7. Stop Condition with ACK and NACKIf a slave cannot r

iv Copyright 2010 Cirrus Logic, Inc. DS732UM10ContentsCS4953xx Hardware User’s Manual 3.2 Serial Control Port Configuration. . . . . . . . . . . . . .

I2C PortCS4953xx Hardware User’s ManualDS732UM10 Copyright 2010 Cirrus Logic, Inc 3-8 3.3.3.2 Performing a Serial I2C WriteInformation provided in thi

3-9 Copyright 2010 Cirrus Logic, Inc. DS732UM10I2C PortCS4953xx Hardware User’s Manual 3.3.3.3 I2C Write Protocol1. An I2C transfer is initiated with

I2C PortCS4953xx Hardware User’s ManualDS732UM10 Copyright 2010 Cirrus Logic, Inc 3-10 Figure 3-9. I2C Read Flow DiagramSCP1_IRQ (LOW)?BYTES READ = 4?

3-11 Copyright 2010 Cirrus Logic, Inc. DS732UM10I2C PortCS4953xx Hardware User’s Manual 3.3.3.5 I2C Read Procedure1. An I2C read transaction is initia

DS732UM10 Copyright 2010 Cirrus Logic, Inc 3-12I2C PortCS4953xx Hardware User’s Manual Figure 3-10. Sample Waveform for I2C Write Functional TImingNot

3-13 Copyright 2010 Cirrus Logic, Inc. DS732UM10SPI PortCS4953xx Hardware User’s Manual 3.3.3.6 SCP1_IRQ BehaviorOnce the BOOT_ASSIST_A (.ULD file) ha

SPI PortCS4953xx Hardware User’s ManualDS732UM10 Copyright 2010 Cirrus Logic, Inc 3-14Table 3-2 shows the signal names, descriptions, and pin number o

3-15 Copyright 2010 Cirrus Logic, Inc. DS732UM10SPI PortCS4953xx Hardware User’s Manual 3.4.1 SPI System Bus DescriptionThe SPI bus is a multi-master

SPI PortCS4953xx Hardware User’s ManualDS732UM10 Copyright 2010 Cirrus Logic, Inc 3-16The data bits of the SCP1_MOSI and SCP1_MISO line are valid on t

3-17 Copyright 2010 Cirrus Logic, Inc. DS732UM10SPI PortCS4953xx Hardware User’s Manual 3.4.3.1 Performing a Serial SPI WriteInformation provided in t

DS732UM10 Copyright 2010 Cirrus Logic, Inc. vFiguresCS4953xx Hardware User’s ManualChapter 8. External Memory Interfaces...

SPI PortCS4953xx Hardware User’s ManualDS732UM10 Copyright 2010 Cirrus Logic, Inc 3-185. The master should poll the SCP1_BSY signal until it goes high

3-19 Copyright 2010 Cirrus Logic, Inc. DS732UM10SPI PortCS4953xx Hardware User’s Manual 3.4.3.4 SPI Read Protocol1. An SPI read transaction is initiat

DS732UM10 Copyright 2010 Cirrus Logic, Inc 3-20SPI PortCS4953xx Hardware User’s Manual Figure 3-17. Sample Waveform for SPI Write Functional Timing Fi

3-21 Copyright 2010 Cirrus Logic, Inc. DS732UM10SPI PortCS4953xx Hardware User’s Manual 3.4.3.5 SCP1_IRQ BehaviorThe SCP1_IRQ signal is not part of th

SPI PortCS4953xx Hardware User’s ManualDS732UM10 Copyright 2010 Cirrus Logic, Inc 3-22

4-1 Copyright 2010 Cirrus Logic, Inc. DS732UM10Parallel Control AvailabilityCS4953xx Hardware User’s ManualChapter 4Parallel Control Port 4.1 Parallel

Parallel Control AvailabilityCS4953xx Hardware User’s ManualDS732UM10 Copyright 2010 Cirrus Logic, Inc 4-2

5-1 Copyright 2010 Cirrus Logic, Inc. DS732UM10Digital Audio Input Port DescriptionCS4953xx Hardware User’s ManualChapter 5Digital Audio Input Interfa

Digital Audio Input Port DescriptionCS4953xx Hardware User’s ManualDS732UM10 Copyright 2010 Cirrus Logic, Inc 5-2 5.1.2 Supported DAI Functional Block

5-3 Copyright 2010 Cirrus Logic, Inc. DS732UM10Digital Audio Input Port DescriptionCS4953xx Hardware User’s Manual Figure 5-1. DAI Port Block DiagramC

vi Copyright 2010 Cirrus Logic, Inc. DS732UM10FiguresCS4953xx Hardware User’s Manual Figure 3-8. I2C Write Flow Diagram ...

Digital Audio Input Port DescriptionCS4953xx Hardware User’s ManualDS732UM10 Copyright 2010 Cirrus Logic, Inc 5-4 5.1.4 Digital Audio FormatsThe DAI h

5-5 Copyright 2010 Cirrus Logic, Inc. DS732UM10DAI Hardware ConfigurationCS4953xx Hardware User’s Manual 5.1.4.2 Left-Justified FormatFigure 5-3 illus

DAI Hardware ConfigurationCS4953xx Hardware User’s ManualDS732UM10 Copyright 2010 Cirrus Logic, Inc 5-6Table 5-3, Table 5-4, Table 5-5, and Table 5-6

5-7 Copyright 2010 Cirrus Logic, Inc. DS732UM10DAI Hardware ConfigurationCS4953xx Hardware User’s Manual2DSD Normal ModeStarting from DAI_D0 to DAI_D4

DAI Hardware ConfigurationCS4953xx Hardware User’s ManualDS732UM10 Copyright 2010 Cirrus Logic, Inc 5-8..** Required for 1-line software header finder

6-1 Copyright 2010 Cirrus Logic, Inc. DS732UM10Description of Digital Audio Input Port when Configured for DSD InputCS4953xx Hardware User’s ManualCha

Description of Digital Audio Input Port when Configured for DSD InputCS4953xx Hardware User’s ManualDS732UM10 Copyright 2010 Cirrus Logic, Inc 6-2 Fig

7-1 Copyright 2010 Cirrus Logic, Inc. DS732UM10Digital Audio Output Port DescriptionCS4953xx Hardware User’s ManualChapter 7Digital Audio Output Inter

Digital Audio Output Port DescriptionCS4953xx Hardware User’s ManualDS732UM10 Copyright 2010 Cirrus Logic, Inc 7-2DAO1_SCLK is the bit clock used to c

7-3 Copyright 2010 Cirrus Logic, Inc. DS732UM10Digital Audio Output Port DescriptionCS4953xx Hardware User’s Manual 7.1.2 Supported DAO Functional Blo

DS732UM10 Copyright 2010 Cirrus Logic, Inc. viiTablesCS4953xx Hardware User’s ManualTablesTable 2-1. Operation Modes...

Digital Audio Output Port DescriptionCS4953xx Hardware User’s ManualDS732UM10 Copyright 2010 Cirrus Logic, Inc 7-4 7.1.3.3 One-line Data Mode Format (

7-5 Copyright 2010 Cirrus Logic, Inc. DS732UM10Digital Audio Output Port DescriptionCS4953xx Hardware User’s ManualTable 7-2 shows values and messages

Digital Audio Output Port DescriptionCS4953xx Hardware User’s ManualDS732UM10 Copyright 2010 Cirrus Logic, Inc 7-6Table 7-4 shows values and messages

7-7 Copyright 2010 Cirrus Logic, Inc. DS732UM10Digital Audio Output Port DescriptionCS4953xx Hardware User’s Manual6DAO_MCLK = 512 FSDAO1_SCLK = DAO_M

Digital Audio Output Port DescriptionCS4953xx Hardware User’s ManualDS732UM10 Copyright 2010 Cirrus Logic, Inc 7-812DAO_MCLK = 384 FsDAO1_SCLK = DAO_M

7-9 Copyright 2010 Cirrus Logic, Inc. DS732UM10Digital Audio Output Port DescriptionCS4953xx Hardware User’s ManualTable 7-5 shows values and messages

Digital Audio Output Port DescriptionCS4953xx Hardware User’s ManualDS732UM10 Copyright 2010 Cirrus Logic, Inc 7-10Table 7-6 shows values and messages

7-11 Copyright 2010 Cirrus Logic, Inc. DS732UM10Digital Audio Output Port DescriptionCS4953xx Hardware User’s ManualTable 7-8 shows values and message

Digital Audio Output Port DescriptionCS4953xx Hardware User’s ManualDS732UM10 Copyright 2010 Cirrus Logic, Inc 7-12§§Table 7-10. S/PDIF Transmitter Co

8-1 Copyright 2010 Cirrus Logic, Inc. DS732UM10SDRAM ControllerCS4953xx Hardware User’s ManualChapter 8External Memory Interfaces 8.1 SDRAM Controller

viii Copyright 2010 Cirrus Logic, Inc. DS732UM10CS4953xx Hardware User’s ManualTable 9-4. PLL Supply Pins...

Flash Memory ControllerCS4953xx Hardware User’s ManualDS732UM10 Copyright 2010 Cirrus Logic, Inc 8-2 8.2 Flash Memory ControllerThe CS4953xx provides

8-3 Copyright 2010 Cirrus Logic, Inc. DS732UM10SDRAM/Flash Controller InterfaceCS4953xx Hardware User’s ManualSD_RAS SDRAM Row Address Strobe 80 109 O

SDRAM/Flash Controller InterfaceCS4953xx Hardware User’s ManualDS732UM10 Copyright 2010 Cirrus Logic, Inc 8-4 8.3.2 Configuring SDRAM/Flash Parameters

8-5 Copyright 2010 Cirrus Logic, Inc. DS732UM10SDRAM/Flash Controller InterfaceCS4953xx Hardware User’s ManualRefer to External Memory Interface in th

SDRAM/Flash Controller InterfaceCS4953xx Hardware User’s ManualDS732UM10 Copyright 2010 Cirrus Logic, Inc 8-6DynamictREXConfigure the self refres exit

8-7 Copyright 2010 Cirrus Logic, Inc. DS732UM10SDRAM/Flash Controller InterfaceCS4953xx Hardware User’s ManualDynamictRFCConfigure the auto refresh pe

SDRAM/Flash Controller InterfaceCS4953xx Hardware User’s ManualDS732UM10 Copyright 2010 Cirrus Logic, Inc 8-8DynamicRasCas0Configure the active bank A

8-9 Copyright 2010 Cirrus Logic, Inc. DS732UM10SDRAM/Flash Controller InterfaceCS4953xx Hardware User’s Manual§§StaticWaitTurn0 (Not Supported)Bus Tur

SDRAM/Flash Controller InterfaceCS4953xx Hardware User’s ManualDS732UM10 Copyright 2010 Cirrus Logic, Inc 8-10

Typical Connection DiagramsCS4953xx Hardware User’s ManualDS732UM10 Copyright 2010 Cirrus Logic, Inc 9-1Chapter 9System Integration 9.1 Typical Connec

1-1 Copyright 2010 Cirrus Logic, Inc. DS732UM10OverviewCS4953xx Hardware User’s ManualChapter 1Introduction 1.1 OverviewThe CS4953xx is a programmable

DS732UM10 Copyright 2010 Cirrus Logic, Inc 9-2Typical Connection DiagramsCS4953xx Hardware User’s Manual Figure 9-1. LQFP-144, I2C Control, Serial FLA

DS732UM10 Copyright 2010 Cirrus Logic, Inc 9-3Typical Connection DiagramsCS4953xx Hardware User’s Manual Figure 9-2. LQFP-144, SPI Control, Serial FLA

DS732UM10 Copyright 2010 Cirrus Logic, Inc 9-4Typical Connection DiagramsCS4953xx Hardware User’s Manual Figure 9-3. LQFP-144, SPI Control, Serial FLA

DS732UM10 Copyright 2010 Cirrus Logic, Inc 9-5Typical Connection DiagramsCS4953xx Hardware User’s Manual Figure 9-4. LQFP-144, I2C Control, Parallel F

DS732UM10 Copyright 2010 Cirrus Logic, Inc 9-6Typical Connection DiagramsCS4953xx Hardware User’s Manual Figure 9-5. LQFP-128, SPI Control, Parallel F

DS732UM10 Copyright 2010 Cirrus Logic, Inc 9-7Typical Connection DiagramsCS4953xx Hardware User’s Manual Figure 9-6. LQFP-128, I2C Control, Serial FLA

DS732UM10 Copyright 2010 Cirrus Logic, Inc 9-8Typical Connection DiagramsCS4953xx Hardware User’s Manual Figure 9-7. LQFP-144, SPI Control, Serial FLA

DS732UM10 Copyright 2010 Cirrus Logic, Inc 9-9Typical Connection DiagramsCS4953xx Hardware User’s Manual Figure 9-8. LQFP-144, SPI Control, Serial FLA

Pin DescriptionCS4953xx Hardware User’s ManualDS732UM10 Copyright 2010 Cirrus Logic, Inc 9-10 9.2 Pin Description 9.2.1 Power and GroundThe following

Pin DescriptionCS4953xx Hardware User’s ManualDS732UM10 Copyright 2010 Cirrus Logic, Inc 9-11memory). Insufficient grounding can degrade noise margins