Cirrus-logic CS5340 Manual de usuario descargar pdf

http://www.cirrus.com

101 dB, 192 kHz, Multi-Bit Audio A/D Converter

Features

 Advanced Multi-bit Delta-Sigma Architecture

 24-bit Conversion

 Supports All Audio Sample Rates Including

192 kHz

 101 dB Dynamic Range at 5 V

 -94 dB THD+N

 90 mW Power Consumption

 High-Pass Filter to Remove DC Offsets

 Analog/Digital Core Supplies from 3.3 V to 5 V

 Supports Logic Levels between 1.8 V and 5 V

 Auto-detect Mode Selection in Slave Mode

 Auto-Detect MCLK Divider

 Pin Compatible with CS5341

General Description

The CS5340 is a complete analog-to-digital converter

for digital audio systems. It performs sampling, analog-

to-digital conversion, and anti-alias filtering, generating

24-bit values for both left and right inputs in serial form

at sample rates up to 200 kHz per channel.

The CS5340 uses a 5th-order, multi-bit Delta-Sigma

modulator followed by digital filtering and decimation,

which removes the need for an external anti-alias filter.

The CS5340 is available in a 16-pin TSSOP package

for Commercial (-10° to +70° C) and Automotive grades

(-40° to +85° C). The CDB5340 Customer Demonstra-

tion Board is also available for device evaluation and

implementation suggestions. Please refer to “Ordering

Information” on page 22 for complete ordering

information.

The CS5340 is ideal for audio systems requiring wide

dynamic range, negligible distortion and low noise, such

as set-top boxes, DVD-karaoke players, DVD record-

ers, A/V receivers, and automotive applications.

High-Pass

Filter

Low-Latency

Digital Filters

High-Pass

Filter

Serial Port

3.3 V to 5 V

Internal

Reference

Voltages

Switch-Cap

ADC

3.3 V to 5 V

1.8 V to 5 V

Auto-detect

MCLK Divider

Slave Mode

Auto-detect

Master Clock

Reset

Single-Ended

Analog Input

Low-Latency

Digital Filters

Switch-Cap

ADC

Mode

Configuration

Single-Ended

Analog Input

SCLK

LRCK

SDOUT

FILT+

AINR

AINL

March '08

DS601F2

Confidential Draft

3/11/08

CS5340

1 2 3 4 5 6 ... 21 22

Indice de contenidos

Pagina 1 - Confidential Draft

Pagina 2

10 DS601F2CS5340Confidential Draft3/11/08DC ELECTRICAL CHARACTERISTICS(GND = 0 V, all voltages with respect to 0 V. MCLK=12.288 MHz; Master Mode)9. Po

Pagina 3

DS601F2 11CS5340Confidential Draft3/11/08SWITCHING CHARACTERISTICS - SERIAL AUDIO PORT(Logic "0" = GND = 0 V; Logic "1" = VL, CL =

Pagina 4

12 DS601F2CS5340Confidential Draft3/11/08 SCLK outputtmslrSDOUTtsdoLRCK outputMSB MSB-1Figure 13. Master Mode, Left-Justified SAI Fi

Pagina 5

DS601F2 13CS5340Confidential Draft3/11/082. PIN DESCRIPTION Pin Name # Pin DescriptionM0M1116Mode Selection (Input) - Determines the operational

Pagina 6

14 DS601F2CS5340Confidential Draft3/11/083. TYPICAL CONNECTION DIAGRAMFILT+V0.1µFA/D CONVERTERSCLKCS5340MCLKVQ1µF+RSTVAL1µF1.8 V to 5V1µF++SDOUTGNDLRC

Pagina 7

DS601F2 15CS5340Confidential Draft3/11/084. APPLICATIONS4.1 Single-, Double-, and Quad-Speed ModesThe CS5340 can support output sample rates from 2 kH

Pagina 8

16 DS601F2CS5340Confidential Draft3/11/084.2.1 Operation as a Clock MasterAs a clock master, LRCK and SCLK operate as outputs. The left/right and seri

Pagina 9

DS601F2 17CS5340Confidential Draft3/11/084.2.3 Master Clock The CS5340 requires a Master clock (MCLK) which runs the internal sampling circuits and di

Pagina 10 - DIGITAL CHARACTERISTICS

18 DS601F2CS5340Confidential Draft3/11/084.4 Power-Up SequenceReliable power-up can be accomplished by keeping the device in reset until the power sup

Pagina 11

DS601F2 19CS5340Confidential Draft3/11/084.8 Capacitor Size on the Reference Pin (FILT+)The CS5340 requires an external capacitance on the internal re

Pagina 12

2 DS601F2CS5340Confidential Draft3/11/08TABLE OF CONTENTS1. CHARACTERISTICS AND SPECIFICATIONS ...

Pagina 13 - 2. PIN DESCRIPTION

20 DS601F2CS5340Confidential Draft3/11/085. PARAMETER DEFINITIONSDynamic RangeThe ratio of the rms value of the signal to the rms sum of all other spe

Pagina 14 - 3. TYPICAL CONNECTION DIAGRAM

DS601F2 21CS5340Confidential Draft3/11/086. PACKAGE DIMENSIONS 1. “D” and “E1” are reference datums and do not included mold flash or protrusions, but

Pagina 15 - 4. APPLICATIONS

22 DS601F2CS5340Confidential Draft3/11/087. ORDERING INFORMATION8. REVISION HISTORYProduct Description Package Pb-Free Grade Temp Range Container Orde

Pagina 16

DS601F2 3CS5340Confidential Draft3/11/08LIST OF FIGURESFigure 1.Single-Speed Mode Stopband Rejection ...

Pagina 17

4 DS601F2CS5340Confidential Draft3/11/081. CHARACTERISTICS AND SPECIFICATIONS(All Min/Max characteristics and specifications are guaranteed over the S

Pagina 18

DS601F2 5CS5340Confidential Draft3/11/08ANALOG CHARACTERISTICS - COMMERCIAL GRADETest Conditions (unless otherwise specified): Input test signal is a

Pagina 19

6 DS601F2CS5340Confidential Draft3/11/08ANALOG CHARACTERISTICS - AUTOMOTIVE GRADETest Conditions (unless otherwise specified): Input test signal is a

Pagina 20 - 5. PARAMETER DEFINITIONS

DS601F2 7CS5340Confidential Draft3/11/08DIGITAL FILTER CHARACTERISTICS 7. Filter characteristics scale precisely with Fs8. Response shown is for Fs

Pagina 21

8 DS601F2CS5340Confidential Draft3/11/08Figure 1. Single-Speed Mode Stopband Rejection Figure 2. Single-Speed Mode Stopband RejectionFigure 3. Sing

Pagina 22 - 8. REVISION HISTORY

DS601F2 9CS5340Confidential Draft3/11/08Figure 7. Double-Speed Mode Transition Band (Detail) Figure 8. Double-Speed Mode Passband RippleFigure 9. Q

Comentarios a estos manuales

Sin comentarios

Cirrus-logic CS5340 Manual de usuario

Busca en linea o descarga Manual de usuario para Hardware Cirrus-logic CS5340. Cirrus Logic CS5340 User Manual Manual de usuario

Indice de contenidos

Comentarios a estos manuales

Relacionado con productos y manuales para Hardware Cirrus-logic CS5340