Cirrus-logic CS5340 Manual de usuario descargar pdf (Pagina 19)

DS601F2 19

CS5340

Confidential Draft

3/11/08

4.8 Capacitor Size on the Reference Pin (FILT+)

The CS5340 requires an external capacitance on the internal reference voltage pin, FILT+. The size of this

decoupling capacitor will affect the low frequency distortion performance as shown in Figure 22, with larger

capacitor values used to optimize low frequency distortion performance. This plot was taken using the

CDB5340 evaluation platform, with the device running in Single-Speed Mode and VA=VD=VL=5 V.

Figure 22. CS5340 THD+N versus Frequency

47 uF

100 uF

22 uF

10 uF

6.8 uF

4.7 uF

3.3 uF

2.2 uF

1 uF

5.6 uF

1 2 ... 14 15 16 17 18 19 20 21 22

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Cirrus-logic CS5340 Manual de usuario Pagina 19