Cirrus-logic CS5364 Manual de usuario descargar pdf (Pagina 11)

DS625F5 11

CS5364

DC POWER

MCLK = 12.288 MHz; Master Mode. GND = 0 V.

1. Power-Down is defined as RST

= LOW with all clocks and data lines held static at a valid logic level.

LOGIC LEVELS

PSRR, VQ AND FILT+ CHARACTERISTICS

MCLK = 12.288 MHz; Master Mode. Valid with the recommended capacitor values on FILT+ and VQ as shown in

the “Typical Connection Diagram”.

Parameter Symbol Min Typ Max Unit

Power Supply Current VA = 5 V

(Normal Operation) VX = 5 V

VD = 5 V

VD = 3.3 V

VLS, VLC = 5 V

VLS, VLC = 3.3 V

Power Supply Current VA = 5 V

(Power-Down) (Note 1) VLS, VLC,VD = 5 V

500

A

Power Consumption

(Normal Operation) All Supplies = 5 V

VA = 5 V, VD = VLS = VLC = 3.3 V

(Power-Down) (Note 1)

510

360

2.75

580

419

Parameter Symbol Min Typ Max Units

High-Level Input Voltage %VLS/VLC V

70 - - %

Low-Level Input Voltage %VLS/VLC V

--30%

High-Level Output Voltage at 100 A load %VLS/VLC V

85 - - %

Low-Level Output Voltage at -100 A load %VLS/VLC V

--15%

SDA Low-Level Output Voltage at -2 mA load %VLC V

--TBD%

OVFL

Current Sink

-4 mA

Input Leakage Current logic pins only I

-10 - 10 A

Parameter Symbol Min Typ Max Unit

Power Supply Rejection Ratio at (1 kHz) PSRR - 65 - dB

Nominal Voltage

Output Impedance

Maximum allowable DC current source/sink

VA/2

k

A

Filt+ Nominal Voltage

Output Impedance

Maximum allowable DC current source/sink

4.4

k

A

1 2 ... 6 7 8 9 10 11 12 13 14 15 16 ... 41 42

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Cirrus-logic CS5364 Manual de usuario Pagina 11

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