Cirrus-logic CS5372 Manual de usuario

Busca en linea o descarga Manual de usuario para Hardware Cirrus-logic CS5372. Cirrus Logic CS5372 User Manual Manual de usuario

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Copyright © Cirrus Logic, Inc. 2005
(All Rights Reserved)
http://www.cirrus.com
CS5371
CS5372
Low-power, High-performance
∆Σ
Modulators
Features & Description
z Fourth-order ∆Σ Architecture
z Clock-jitter-tolerant Architecture
z Input Voltage: 5 V
pp
Fully Differential
z High Dynamic Range
127 dB SNR @ 215 Hz BW (2 ms Output)
124 dB SNR @ 430 Hz BW (1 ms Output)
z Low Total Harmonic Distortion
-118 dB THD Typical, -112 dB THD Maximum
z Low Power Consumption
Normal Mode: 25 mW per Channel
Low-power Mode: 15 mW per Channel
z Small Footprint, 24-pin SSOP Package
z Single- or Multi-channel System Support
1-channel System: CS5371
2-channel System: CS5372
3-channel System: CS5371 + CS5372
4-channel System: CS5372 + CS5372
z Single or Dual Power Supply Configurations
VA+ = +5 V; VA- = 0 V; VD = +3.3 V to +5 V
VA+ = +2.5 V;VA- = -2.5 V;VD = +3.3 V
Description
The CS5371 and CS5372 are one- and two-channel,
high dynamic range, fourth-order ∆Σ modulators intend-
ed for geophysical and sonar applications. Used in
combination with the CS5376A or CS5378 digital filters,
a unique high-resolution A/D measurement system
results.
The CS5371 and CS5372 have high dynamic range
(127 dB @ 215 Hz bandwidth) and low total harmonic
distortion (typically -118 dB THD), with very low power
consumption per channel. In normal mode
(LPWR=0, MCLK=2.048MHz), power consumption is
25 mW per channel, and in low-power mode
(LPWR=1, MCLK=1.024MHz), power consumption is
15 mW per channel. Each modulator can be indepen-
dently powered down to 1 mW per channel, and by
halting the input clock, they will enter a micropower state
using only 10 µW per channel.
The modulators generate an oversampled serial bit
stream at 512 kbits per second when operated from a
clock frequency of 2.048 MHz. They are available in a
small 24-pin SSOP package, providing exceptional per-
formance in a very small footprint.
ORDERING INFORMATION
See page 21.
INF1+
VA+
4
TH
ORDER
INR1+
INR1-
VREF+
VREF-
MDATA2
MSYNC
MCLK
PWDN1
VD
∆−Σ
MODULATOR
INF1-
PWDN2
INF2+
4
TH
ORDER
INR2+
INR2-
∆−Σ
MODULATOR
INF2-
OFST LPWR DGND
MFLAG2
CLOCK
GENERATOR
MDATA1
MFLAG1
VA-
INF+
VA+
4
TH
ORDER
INR+
INR-
VREF+
VREF-
MSYNC
MCLK
PWDN
VD
∆−Σ
MODULATOR
INF-
OFST LPWR DGND
CLOCK
GENERATOR
MDATA
MFLAG
VA-
CS5371
CS5372
OCT ‘05
DS255F3
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Indice de contenidos

Pagina 1 - Modulators

Copyright © Cirrus Logic, Inc. 2005(All Rights Reserved)http://www.cirrus.comCS5371CS5372Low-power, High-performance ∆Σ ModulatorsFeatures & Descr

Pagina 2

CS5371 CS537210 DS255F3small signals, reducing the gain requirements forinput amplifier stages by a factor of two relative tosingle ended analog input

Pagina 3

CS5371 CS5372DS255F3 11input signal is a steady state DC signal within±50 mV of the common mode input voltage. Idletones result from patterns in the o

Pagina 4

CS5371 CS537212 DS255F3over which voltage reference noise affects theCS5371/72 modulator dynamic range.6.1. Voltage Reference ConfigurationsFor a 2.5

Pagina 5

CS5371 CS5372DS255F3 13bit stream at 512 kbits per second when operatedfrom a 2.048 MHz modulator clock.7.1. Modulator Clock - MCLKFor proper operatio

Pagina 6

CS5371 CS537214 DS255F3achieved. During this time, the MFLAG pin transi-tions from low to high to signal an error condition.The analog input signal m

Pagina 7

CS5371 CS5372DS255F3 159.3. SCR Latch-up ConsiderationsThe VA- pin is tied to the CS5371/72 substrate andshould always be connected to the most negati

Pagina 8

CS5371 CS537216 DS255F310. PIN DESCRIPTION - CS5371Power SuppliesVA+ _ Positive Analog Power Supply, pin 8Positive supply voltage. VA- _ Negative Anal

Pagina 9

CS5371 CS5372DS255F3 17INF- _ Fine Inverting Input, pin 3Fine inverting analog input.VREF+ _ Positive Voltage Reference Input, pin 5Input for an exter

Pagina 10 - CS5371 CS5372

CS5371 CS537218 DS255F311. PIN DESCRIPTION - CS5372Power SuppliesVA+ _ Positive Analog Power Supply, pin 8Positive supply voltage. VA- _ Negative Anal

Pagina 11

CS5371 CS5372DS255F3 19INF1-, INF2- _ Channel 1 & 2 Fine Inverting Input, pin 3, 10Fine inverting analog inputs.VREF+ _ Positive Voltage Reference

Pagina 12

CS5371 CS53722 DS255F3TABLE OF CONTENTS1. CHARACTERISTICS & SPECIFICATIONS... 3ANALOG CHARACTERIST

Pagina 13

CS5371 CS537220 DS255F312.PACKAGE DIMENSIONSNotes: 1. “D” and “E1” are reference datums and do not included mold flash or protrusions, but do include

Pagina 14

CS5371 CS5372DS255F3 2113.ORDERING INFORMATION 14.ENVIRONMENTAL, MANUFACTURING, & HANDLING INFORMATION* MSL (Moisture Sensitivity Level) as specif

Pagina 15

CS5371 CS537222 DS255F315.REVISION HISTORY Revision Date ChangesPP2 AUG 2001 Preliminary release, updated with most-current characterization data.F1 S

Pagina 16

CS5371 CS5372DS255F3 31. CHARACTERISTICS & SPECIFICATIONSANALOG CHARACTERISTICS Notes:TA= -40 C to +85 C; VA+ = 5V or 2.5V ± 5%; VA - = 0V or

Pagina 17

CS5371 CS53724 DS255F3ANALOG CHARACTERISTICS (Continued)Notes: 7. The upper bandwidth limit is determined by the digital filter. A simple single pole

Pagina 18

CS5371 CS5372DS255F3 5DIGITAL CHARACTERISTICS Notes:TA= 25 C; VA+ = 5V or 2.5V ±5%; VA- = 0V or -2.5V ±5%; VD = 5V or 3.3V ± 5%; DGND = 0V; All voltag

Pagina 19

CS5371 CS53726 DS255F3SWITCHING CHARACTERISTICS Notes:TA= -40 C to +85 C; VA+ = +5V or +2.5V ± 5%; VA-= 0V or -2.5V ± 5%; VD = +5V or +3.3V ± 5%; Digi

Pagina 20

CS5371 CS5372DS255F3 72. GENERAL DESCRIPTION.The CS5371 and CS5372 are one- and two- chan-nel fourth-order ∆Σ modulators, optimized for ex-tremely hig

Pagina 21

CS5371 CS53728 DS255F3CS5376AMSYNCMSYNCMFLAG1MFLAG1MCLKMCLKMDATA1MDATA1MFLAG2MFLAG2MDATA2MDATA20.02 µF 0.02 µFINRI+INFI+INFI-INRI-INR2+INF2+INF2-INR

Pagina 22

CS5371 CS5372DS255F3 93. MODULATOR PERFORMANCEFigures 4 and 5 illustrate the spectral performanceof the CS5371/72 modulators when combined withthe CS5

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