Copyright © Cirrus Logic, Inc. 2005(All Rights Reserved)http://www.cirrus.comCS5371CS5372Low-power, High-performance ∆Σ ModulatorsFeatures & Descr
CS5371 CS537210 DS255F3small signals, reducing the gain requirements forinput amplifier stages by a factor of two relative tosingle ended analog input
CS5371 CS5372DS255F3 11input signal is a steady state DC signal within±50 mV of the common mode input voltage. Idletones result from patterns in the o
CS5371 CS537212 DS255F3over which voltage reference noise affects theCS5371/72 modulator dynamic range.6.1. Voltage Reference ConfigurationsFor a 2.5
CS5371 CS5372DS255F3 13bit stream at 512 kbits per second when operatedfrom a 2.048 MHz modulator clock.7.1. Modulator Clock - MCLKFor proper operatio
CS5371 CS537214 DS255F3achieved. During this time, the MFLAG pin transi-tions from low to high to signal an error condition.The analog input signal m
CS5371 CS5372DS255F3 159.3. SCR Latch-up ConsiderationsThe VA- pin is tied to the CS5371/72 substrate andshould always be connected to the most negati
CS5371 CS537216 DS255F310. PIN DESCRIPTION - CS5371Power SuppliesVA+ _ Positive Analog Power Supply, pin 8Positive supply voltage. VA- _ Negative Anal
CS5371 CS5372DS255F3 17INF- _ Fine Inverting Input, pin 3Fine inverting analog input.VREF+ _ Positive Voltage Reference Input, pin 5Input for an exter
CS5371 CS537218 DS255F311. PIN DESCRIPTION - CS5372Power SuppliesVA+ _ Positive Analog Power Supply, pin 8Positive supply voltage. VA- _ Negative Anal
CS5371 CS5372DS255F3 19INF1-, INF2- _ Channel 1 & 2 Fine Inverting Input, pin 3, 10Fine inverting analog inputs.VREF+ _ Positive Voltage Reference
CS5371 CS53722 DS255F3TABLE OF CONTENTS1. CHARACTERISTICS & SPECIFICATIONS... 3ANALOG CHARACTERIST
CS5371 CS537220 DS255F312.PACKAGE DIMENSIONSNotes: 1. “D” and “E1” are reference datums and do not included mold flash or protrusions, but do include
CS5371 CS5372DS255F3 2113.ORDERING INFORMATION 14.ENVIRONMENTAL, MANUFACTURING, & HANDLING INFORMATION* MSL (Moisture Sensitivity Level) as specif
CS5371 CS537222 DS255F315.REVISION HISTORY Revision Date ChangesPP2 AUG 2001 Preliminary release, updated with most-current characterization data.F1 S
CS5371 CS5372DS255F3 31. CHARACTERISTICS & SPECIFICATIONSANALOG CHARACTERISTICS Notes:TA= -40 C to +85 C; VA+ = 5V or 2.5V ± 5%; VA - = 0V or
CS5371 CS53724 DS255F3ANALOG CHARACTERISTICS (Continued)Notes: 7. The upper bandwidth limit is determined by the digital filter. A simple single pole
CS5371 CS5372DS255F3 5DIGITAL CHARACTERISTICS Notes:TA= 25 C; VA+ = 5V or 2.5V ±5%; VA- = 0V or -2.5V ±5%; VD = 5V or 3.3V ± 5%; DGND = 0V; All voltag
CS5371 CS53726 DS255F3SWITCHING CHARACTERISTICS Notes:TA= -40 C to +85 C; VA+ = +5V or +2.5V ± 5%; VA-= 0V or -2.5V ± 5%; VD = +5V or +3.3V ± 5%; Digi
CS5371 CS5372DS255F3 72. GENERAL DESCRIPTION.The CS5371 and CS5372 are one- and two- chan-nel fourth-order ∆Σ modulators, optimized for ex-tremely hig
CS5371 CS53728 DS255F3CS5376AMSYNCMSYNCMFLAG1MFLAG1MCLKMCLKMDATA1MDATA1MFLAG2MFLAG2MDATA2MDATA20.02 µF 0.02 µFINRI+INFI+INFI-INRI-INR2+INF2+INF2-INR
CS5371 CS5372DS255F3 93. MODULATOR PERFORMANCEFigures 4 and 5 illustrate the spectral performanceof the CS5371/72 modulators when combined withthe CS5
Comentarios a estos manuales