Cirrus-logic EP7309 Manual de usuario Pagina 4
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4 Copyright Cirrus Logic, Inc. 2011
(All Rights Reserved) DS507F2
EP7309
High-Performance, Low-Power System on Chip
256-Ball PBGA Ball Listing ........................................................................................................................ 30
JTAG Boundary Scan Signal Ordering ............................................................................................................... 34
CONVENTIONS .................................................................................................................................39
Acronyms and Abbreviations .............................................................................................................................. 39
Units of Measurement ......................................................................................................................................... 39
General Conventions .......................................................................................................................................... 40
Pin Description Conventions ............................................................................................................................... 40
.................................................................................................................................................................. 40
Ordering Information .......................................................................................................................41
Environmental, Manufacturing, & Handling Information .............................................................41
Revision History ..............................................................................................................................42
- EP7309 Data Sheet 1
- FEATURES (cont) 2
- OVERVIEW (cont.) 2
- Table of Contents 3
- List of Figures 5
- List of Tables 5
- Digital Audio Interface (DAI) 7
- CODEC Interface 7
- Synchronous Serial Interface 8
- LCD Controller 8
- 64-Keypad Interface 8
- Interrupt Controller 8
- Real-Time Clock 8
- (All Rights Reserved) 9 9
- Internal Boot ROM 10
- Packaging 10
- Pin Multiplexing 10
- System Design 11
- ELECTRICAL SPECIFICATIONS 12
- STANDBY 13
- Timing Diagram Conventions 14
- Timing Conditions 14
- Static Memory 15
- SSI1 Interface 20
- SSI2 Interface 21
- LCD Interface 22
- JTAG Interface 23
- Packages 24
- 208-Pin LQFP 25
- (All Rights Reserved) DS507F2 26
- (All Rights Reserved) 27 27
- (All Rights Reserved) 29 29
- 256-Ball PBGA Ball Listing 30
- (All Rights Reserved) 31 31
- (All Rights Reserved) 33 33
- (All Rights Reserved) 35 35
- (All Rights Reserved) 37 37
- CONVENTIONS 39
- General Conventions 40
- Pin Description Conventions 40
- Ordering Information 41
- Revision History 42
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