Cirrus-logic CDB5376 Manual de usuario

Copyright © Cirrus Logic, Inc. 2008(All Rights Reserved)www.cirrus.comCDB5376Multichannel Seismic Evaluation SystemFeaturesz Four-channel Seismic Acqu

CDB537610 DS612DB31.2.2 Default DIP Switch Settings Table 5. RS-485 Default Jumper Settings J14I2C ClockSCL+ 1 ---------- 2SCL- 3 ---------- 4SCL 5 **

CDB5376DS612DB3 111.3 Software Setup1.3.1 PC RequirementsThe PC hardware requirements for the Cirrus Seismic Evaluation system are:• Windows XP®, Wind

CDB537612 DS612DB3CDB5376 as an unknown USB device.• If prompted for a USB driver, skip to the next step. If not, using Windows Hardware Device Manage

CDB5376DS612DB3 131.4 Self-testing CDB5376Noise and distortion self-tests can be performed once hardware and software setup are complete.First, initia

CDB537614 DS612DB3• Once the Setup panel is set, select Configure on the Digital Filter sub-panel.• After digital filter configuration is complete, cl

CDB5376DS612DB3 152. HARDWARE DESCRIPTION2.1 Block Diagram Major blocks of the CDB5376 evaluation board include:• CS3301A Geophone Amplifier (2x)• CS3

CDB537616 DS612DB32.2 Analog Hardware2.2.1 Analog Inputs2.2.1.1 External Inputs - INA, INB, BNCExternal signals into CDB5376 are from two major classe

CDB5376DS612DB3 172.2.1.3 Internal Inputs - DAC_OUT, DAC_BUFThe CS4373A test DAC has two high-performance differential test outputs, a precision outpu

CDB537618 DS612DB32.2.1.6 Common Mode BiasDifferential analog signals into the CS3301A/02A amplifiers are required to be biased to the center of thepo

CDB5376DS612DB3 192.2.2 Differential AmplifiersThe CS3301A/02A amplifiers act as a low-noise gain stage for internal or external differential analog s

CDB53762 DS612DB3REVISION HISTORY Revision Date ChangesDB1 FEB 2006 Initial release.DB2 MAR 2006 Added USB support.DB3 DEC 2007Updated schematics:CS33

CDB537620 DS612DB32.2.2.3 Anti-alias RC FiltersThe CS5372A ∆Σ modulator is 4th order and high-frequency input signals can cause instability. Simplesin

CDB5376DS612DB3 212.2.3.2 Offset Enable - OFSTThe CS5372A ∆Σ modulator requires differential offset to be enabled to eliminate idle tones for a termi-

CDB537622 DS612DB32.2.5 Voltage ReferenceA voltage reference on CDB5376 creates a precision voltage from the regulated analog supplies for themodulato

CDB5376DS612DB3 232.3 Digital Hardware2.3.1 Digital FilterThe CS5376A quad digital filter performs filtering and decimation of four delta-sigma bit st

CDB537624 DS612DB3Modulator ∆Σ data is input through the modulator interface.Test DAC ∆Σ data is generated by the test bit stream generator.Amplifier,

CDB5376DS612DB3 252.3.1.1 MCLK Conversion to ACLKThe CS5376A digital filter creates the analog sampling clock used by the CS5372A ∆Σ modulators andCS4

CDB537626 DS612DB3output sync, reset;///////////////////////// signal assignments///////////////////////assign sck = ssi_mc? 1'bz:sck_mc;assign

CDB5376DS612DB3 272.3.3 Digital Control SignalsThe reset, synchronization, and timebreak signals to the CS5376A digital filter can be generated by pus

CDB537628 DS612DB3Pin # Pin Name Assignment Description 1 P0.1 SDTKI_MC Token to start CS5376A data transaction 2 P0.0 SYNC_IO SYNC signal from

CDB5376DS612DB3 29Many connections to the C8051F320 microcontroller are inactive by default, but are provided for conve-nience during custom reprogram

CDB5376DS612DB3 3TABLE OF CONTENTS1. INITIAL SETUP ...

CDB537630 DS612DB3input on CDB5376 can receive a lower-frequency system clock and create a synchronous higher-frequen-cy clock using an on-board PLL.

CDB5376DS612DB3 312.3.6 RS-485 TelemetryBy default, CDB5376 communicates with the PC evaluation software through the microcontroller USBport. Addition

CDB537632 DS612DB3A microcontroller software connection is made when the SYNC_MC signal output is created by the micro-controller on command from the

CDB5376DS612DB3 332.3.8 External ConnectorPower supplies and telemetry signals route to a 20-pin double row connector with 0.1" spacing (J26). Th

CDB537634 DS612DB3The VA+ and VA- power supplies to the analog components on CDB5376 can be jumpered to use regu-lated bipolar power supplies (+2.5 V,

CDB5376DS612DB3 35The VD and VCORE power supplies on CDB5376 include reverse-biased Schottkey diodes to ground toprotect against reverse voltages that

CDB537636 DS612DB3modulators are 4-wire INR+, INF+, INF-, INR- quad groups, and are routed with INF+ and INF- as a tra-ditional differential pair and

CDB5376DS612DB3 372.5.4 Dual Row HeadersTo simplify signal tracing on CDB5376, all device pins connect to dual-row headers. These dual-row head-ers ar

CDB537638 DS612DB33. SOFTWARE DESCRIPTION3.1 Menu BarThe menu bar is always present at the top of the software panels and provides typical File and He

CDB5376DS612DB3 393.2 About PanelThe About panel displays copyright information for the Cirrus Seismic Evaluation software.Click OK to exit this panel

CDB53764 DS612DB33.4.3 Plot Enable ... 493.4.4

CDB537640 DS612DB33.3 Setup PanelThe Setup panel initializes the evaluation system to perform data acquisition. It consists of the followingsub-panels

CDB5376DS612DB3 413.3.1 USB PortThe USB Port sub-panel sets up the USB communication interface between the PC and the target board.Control Description

CDB537642 DS612DB33.3.2 Digital FilterThe Digital Filter sub-panel sets up the digital filter configuration options.By default the Digital Filter sub-

CDB5376DS612DB3 433.3.3 Analog Front EndThe Analog Front End sub-panel configures the amplifier, modulator, and test DAC pin options. Pin op-tions are

CDB537644 DS612DB33.3.5 Gain/OffsetThe Gain / Offset sub-panel controls the digital filter GAIN and OFFSET registers for each channel.The OFFSET and G

CDB5376DS612DB3 453.3.6 Data CaptureThe Data Capture sub-panel collects samples from the target board and sets analysis parameters.When the Capture bu

CDB537646 DS612DB33.3.7 External MacrosMacros are generated within the Macros sub-panel on the Control panel. Once a macro has been builtit can either

CDB5376DS612DB3 473.4 Analysis PanelThe Analysis panel is used to display the analysis results on collected data. It consists of the followingcontrols

CDB537648 DS612DB33.4.1 Test SelectThe Test Select control sets the type of analysis to be run on the collected data set.Control DescriptionTime Domai

CDB5376DS612DB3 493.4.2 StatisticsThe Statistics control displays calculated statistics for the selected analysis channel. For multichanneldata captur

CDB5376DS612DB3 5LIST OF FIGURESFigure 1. CDB5376 Block Diagram...

CDB537650 DS612DB33.4.4 CursorThe Cursor control is used to identify a point on the graph using the mouse and then display its plot values.When any po

CDB5376DS612DB3 513.5 Control PanelThe Control panel is used to write and read register settings and to send commands to the digital filter.It consist

CDB537652 DS612DB33.5.1 DF RegistersThe DF Registers sub-panel writes and reads registers within the digital filter. Digital filter registers con-trol

CDB5376DS612DB3 533.5.4 MacrosThe Macros sub-panel is designed to write a large number of registers with a single command. This al-lows the target eva

CDB537654 DS612DB33.5.6 CustomizeThe Customize sub-panel sends commands to upload custom FIR and IIR filter coefficients, upload cus-tom test bit stre

CDB5376DS612DB3 554. BILL OF MATERIALS CIRRUS LOGICCDB5376_REV_D2.bomBILL OF MATERIAL (Page 1 of 3)Item Cirrus P/N Rev Description Qty Reference Desig

CDB537656 DS612DB3CIRRUS LOGICCDB5376_REV_D2.bomBILL OF MATERIAL (Page 2 of 3)Item Cirrus P/N Rev Description Qty Reference Designator MFG MFG P/N Not

CDB5376DS612DB3 57CIRRUS LOGICCDB5376_REV_D2.bomBILL OF MATERIAL (Page 3 of 3)Item Cirrus P/N Rev Description Qty Reference Designator MFG MFG P/N Not

CDB537658 DS612DB35. LAYER PLOTS

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CDB53766 DS612DB3LIST OF TABLESTable 1. Analog Inputs Default Jumper Settings...

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CDB537666 DS612DB36. SCHEMATICS

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CDB537668 DS612DB3

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CDB5376DS612DB3 71. INITIAL SETUP1.1 Kit ContentsThe CDB5376 evaluation kit includes:• CDB5376 Evaluation Board• USB Cable (A to B)• Software Download

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CDB537676 DS612DB3

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CDB53768 DS612DB31.2.1 Default Jumper Settings J27, J227, J327, J427CH1, CH2, CH3, CH4Analog Input SelectionsDAC_OUT+ 1 **2INA+DAC_OUT- 3 **4INA-DAC_

CDB537680 DS612DB3

CDB5376DS612DB3 9 J11VA+ Voltage Selection+2.5VA 1 ---------- 2+5VA 3 **4EXT_VA+ 5 **6 J12VD Input Voltage SourceEXT_VA+ 1 **2EXT_VD 3 ---------- 4J