Cirrus-logic CRD48L10 Manual de usuario Pagina 24

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10
3.2 MCU UI Controlled
Figure 3-21. LINE IN Snapshot
Figure 3-22. S/PDIF IN (Same as Initial) Snapshot
Figure 3-23. LINE IN + S/PDIF Snapshot
The clocking topology is the same as used in Section 3.1.6.
Digital MIC
MIC1
MIC2
Line In (L)
Line In (R)
ASP OUT
XSP OUT
DAI1
DAI2
SPDIF RX
(CS 8416 )
Level
Translation
DAO1
DAO2
Level
Translation
SPDIF TX
(CS8406 )
ASP IN
XSP IN
Speakerphone (L)
Speakerphone (R)
AMP
(CS3501 )
EAR
Headphone Outputs (L&R)
Line Outputs (L&R)
(CS42 L73 )
Mini Optical RX
Or
1/8 " Coax
Mini Optical TX
VSP OUTVSP IN
SCP
(CS48L10)
ADC
DAC
DAC
Digital MIC
MIC1
MIC2
Line In (L)
Line In (R)
ASP OUT
XSP OUT
DAI1
DAI2
SPDIF RX
(CS 8416 )
Level
Translation
DAO1
DAO2
Level
Translation
SPDIF TX
(CS8406 )
ASP IN
XSP IN
Speakerphone (L)
Speakerphone (R)
AMP
(CS3501 )
EAR
Headphone Outputs (L&R)
Line Outputs (L&R)
(CS42 L73 )
Mini Optical TX
VSP OUTVSP IN
SCP
(CS48L10)
ADC
DAC
DAC
Mini Optical RX
Or
1/8" Coax
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